A balanced mixture between lectures and discussions on practical analog / mixed-signal test and DfT challenges. Course material: lecture notes.
Integrated circuits (ICs) are manufactured by a long sequence of high-precision and hence defectprone processing steps. Each IC must undergo stringent electrical tests to weed out defective parts and guarantee outgoing product quality to the customer. The field of ‘Design-for-Test’ (DfT) focuses in the broad sense on developing economically adequate tests for ICs. The tests must ensure sufficient quality at acceptable test application costs, corresponding to the target application area (e.g., wireless consumer products have less stringent quality requirements, but also different test cost budgets than medical or aerospace products).
Analog and mixed-signal (A/MS) ICs require different testers than for digital ICs, as well as different DfT techniques, measures of test quality, fault simulation, and test programs. Until quite recently, there has been very little automation to address these differences, mostly due to a lack of standardization in defining analog faults and defects, measuring a test’s coverage, test access to ICs, and DfT circuitry. This course teaches the principles of practical A/MS DfT and test, and the imminent IEEE standards that facilitate systematic solutions now and eventually much more automation.
This course is presented by a world-renowned speaker in the field with broad scientific and industrial experience: Steve Sunter, Engineering Director for Mixed Signal DfT of Siemens EDA.
He just received the prestigious Bob Madge Innovation award at the International Test Conference, San Diego.
This award recognizes “innovation that matters” in semiconductor design, test and data analysis.
An expert in his field, Steve was instrumental in providing the first commercially successful analog defect simulator.
He is chair of the P1687.2 Working Group and past-chair for P2427, and he has been a member, vice-chair or chair of every IEEE working group and conference program committee related to mixed-signal DFT.
A prolific ITC conference paper author, Steve has also provided an analog DFT tutorial at ITC for more than twenty years.
This training is available for open enrollment as well as for in-company sessions. For in-company sessions, the training can be adapted to your situation and special needs.
Objective
After the course, the participant will:
- understand the trends and challenges of testing for manufacturing defects in the overall IC product creation process;
- know the dominant IC defect types (shorts, opens, parametric) and their associated simulation models;
- know the role of simulation for defect modeling and how defect coverage can be measured in a practical amount of time;
- know the requirements of IEEE P2427 for reporting defect coverage;
- understand the basics of measuring ISO 26262 metrics for functional safety;
- know techniques to make the analog portion of an IC more testable: test access ports, analog test busses, reconfiguration, serial shift registers for conveying control and results, mixedsignal wrappers, reuse of on-chip resources, and Built-In Self-Test (BIST);
- know how to describe mixed-signal test access and tests according to IEEE P1687.2;
- know the concept of automating test program generation from a generic mixed-signal test language;
- be able to make a reasoned choice from available Design-for-Test (DfT) techniques.
Target audience
This course is intended for those involved in DfT and test of A/MS ICs: Analog / mixed-signal IC design engineers, test and
product engineers, and DfT engineers. Also: test researchers, test methodology developers, test tool developers, and their managers!
Required background knowledge:
- Education level: technical college / university in Electrical or Computer Engineering;
- Familiarity with analog IC design, manufacturing, testing, and related statistics;
- Recommended: several years of industrial practice.
Program
Afternoon 1: Mixed-Signal DfT and BIST: Trends, Challenges and Solutions
- Introduction
- Trends in analog testing and DfT
- Trends in analog DfT standards
- Trends in analog BIST
- Essential principles of practical analog BIST
- Road to practical solutions
- Conclusions
Afternoon 2: Analog Defect Modelling and Measuring Defect Coverage
- Introduction
- Analog defects
- Analog defect injection for simulation
- Defect weighting
- Defect simulation
- Estimating DPPM
- Diagnosing undetected defects to improve coverage
- Measuring ISO 26262 metrics
- Conclusions
Afternoon 3: Systematic Analog DfT and Test Generation
- Introduction
- Systematic DfT strategies
- Overview of IEEE 1687 and P1687.2
- IEEE P1687.2 Instrument Connectivity Language (ICL) to describe test access
- IEEE P1687.2 Procedural Description Language (PDL) to describe mixed-signal tests
- From block-level to IC-level, to ATE
- Conclusions
Afternoon 4: Analog IJTAG Practical Example, and iStream, Q&A
- Analog IJTAG Practical Example, and iStream
- Instructor presents answers to any questions during course that could not be answered immediately
- General Q&A about course content
- Discussion on attendee-submitted A/MS test and DfT problems and challenges
Methods
Certification
Participants will receive a High Tech Institute course certificate for attending this training.
Remarks from participants
"Most important items I’ve learned: Different IEEE specs, how to deal with coverage, and different test techniques."
Marwin van de Hoeve - Nexperia"Good starting for analog DfT; it gives a helicopter view of what is going on with Analog DFT testing. I now have a starting point on reading to go in-depth. For me especially analog design, the part on how to check the fault coverage, how to improve and how to handle it."
Paulo Lookman - Nexperia
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